(A) Field of the Invention
The present invention relates to a vertical probe and a probe card for integrated circuit devices using the same, and more particularly, to a vertical probe having a depressed structure providing vertical displacement for relieving the stress generated as the vertical probe contacts the device under test and a probe card for integrated circuit devices using the same.
(B) Description of the Related Art
Generally, it is necessary to test the electrical characteristics of integrated circuit devices on the wafer level to check whether the integrated circuit device satisfies the product specification. Integrated circuit devices with electrical characteristic satisfying the specification will be selected for the subsequent packaging process, and the other devices will be discarded to avoid additional packaging cost. Another electrical property test will be performed on the integrated circuit device after the packaging process is completed to screen out the below standard devices to increase the product yield.
There are two major types of probes according to the prior art, i.e., the cantilever probe and the vertical probe. The cantilever probe provides appropriate vertical displacement when the probe tip contacts an integrated circuit device under test via a cantilever contact structure designed to prevent the integrated circuit device under test from being exposed to excessive probe pressure applied by the probe tip. However, the cantilever contact structure occupies a larger planar space in a matrix array probing, which constrains the cantilever probe from being arranged in a fine pitch manner corresponding to an integrated circuit device with high-density of pins, therefore it cannot be applied to the testing of the integrated circuit devices with high-density of pins.
The vertical probe offers the vertical displacement required by the probe tip to contact the integrated circuit device under test using the deformation of the probe body itself, and can be arranged in a fine pitch manner corresponding to the integrated circuit devices under test with high-density of pin. However, if the deformation of the probe body is so large that adjacent probes may contact each other, this may cause short circuits or collisions.
U.S. Pat. No. 4,599,559 discloses a cantilever probe assembly for checking the electronic properties of integrated circuit devices. The cantilever probe is used to contact the pad of the device under test to build a path for propagating the test signal. However, the cantilever probe needs a space to receive the lateral cantilever, which limits the application of the cantilever probe to checking the electronic properties of integrated circuit devices with high-density pads.
U.S. Pat. No. 5,977,787 discloses a vertical probe assembly for checking the electronic properties of integrated circuit devices. The vertical probe assembly includes a buckling beam, an upper plate and a bottom plate. The vertical probe is used to contact the pad of the device under test to build a path for propagating the test signal, and bend itself to relieve the stress generated as the probe contacts the device under test. The upper plate and the bottom plate have holes to hold the buckling beam, and the hole of the upper plate deviates from the hole of the bottom plate, i.e., it is not positioned in a mirror image manner. In addition, frequent bending of the vertical probe is likely to generate metal fatigue and the lifetime of the vertical probe is thereby shortened.
U.S. Pat. No. 5,952,843 discloses a vertical probe assembly for checking the electronic properties of integrated circuit devices. The vertical probe assembly includes a bend beam, an upper plate and a bottom plate. The vertical probe has an S-shaped bend portion configured to relieve the stress generated as the probe contacts the device under test. In addition, the upper plate and the bottom plate have holes to hold the buckling beam, and the holes of the upper plate and the bottom plate are positioned in a mirror image manner, without deviation each other.
U.S. Pat. No. 6,476,626 discloses a probe contact system capable of adjusting distances between tips of the contactors and contact targets with a simple and low cost mechanism. The probe contact system uses a POGO pin to relieve the stress generated as the probe contacts the device under test. The POGO pin has a spring to relieve the stress so as to prevent the POGO pin from over-bending and generating metal fatigue.
U.S. Pat. No. 6,621,710 discloses a modular probe card assembly comprising a silicon substrate with probes modularly assembled on a main board. The silicon substrate has probes fabricated by the micro-electron-mechanical technique, which can fabricate the probe at very fine size and pitch. Consequently, the modular probe card assembly can be applied to integrated circuit devices with high-density pads